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 TEA7089A
LOW-RANGE PHONE DEDICATED CHIP
. . . . . . .
RING - GENERATION OF 8 MELODY TONES (Including the 3 German Melody Tones) - 4 STEPS DIGITAL CONTROL ON THE AMPLIFIER OUTPUT LEVEL SPEECH - TRANSMIT GAINEXTERNALLY ADJUSTABLE - RECEIVINGGAINEXTERNALLYADJUSTABLE - AGCSLOPEEXTERNALLYPROGRAMMABLE - SOFTCLIPPING ON SENDING CHANNEL - RECEIVE AMPLIFIER FOR PIEZO OR ELECTRODYNAMIC TRANSDUCER - +6dB MODE ON RECEIVE CHANNEL - LINE POWER MANAGEMENT DIALING - DTMF GENERATOR - LOW DC MASK DURING MAKE PERIOD THROUGH MICROCONTROLLER SERIAL BUS INTERFACE MICROCONTROLLER INTERFACE - 1.79MHz CLOCK OR 3.58MHz OSCILLATOR INPUT MICROCONTROLLER POWER SUPPLY MICROCONTROLLER CONTROL INTERFACE INCLUDING SERIAL BUS LINE CURRENT EXTRACTOR FOR SUPPLY OF EXTERNAL PERIPHERALS
SO28 (Plastic Package) ORDER CODE : TEA7089AFP
PIN CONNECTIONS
S OFT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
DTMF
RECIN SN AGC MIC1
MIC2
VREF VRMC
DCL DATA
MSK OSC RI
P ON
GTR
DESCRIPTION The TEA7089A is a Telephone Analog Front End device, TAFE, which integrates the three basic functions of a standard telephone set : - Speech network, - DTMF generator, - Ringer generator on buzzer. A complete telephone set can be designed using TEA7089A associated with a low cost microcontroller.
June 1998
VCC GND IVLS
VS
RES
VRING BUZ
7089A-01.EPS
VL VMC GREC
EAR+
EAR-
1/17
TEA7089A
SPEECH The speech network includes : - a low noise transmit channel suitable for any kind of microphone transducer. Softclipping on transmit line signal is provided by the chip. - a low noise receive channel with symmetrical outputs to be compatible with both piezoceramic and electrodynamic earpiece. An additional 6dB gain can be inserted in the receive channel through software control. - a line length gain control (AGC) with starting point of gain regulation fixed at 25mAline current ; slope of gain regulationis externallyadjustablewith one resistor.AGC can be removedby hardware (maximum gain flat) or by software (-2dB flat). The phone impedance and sidetone can be tuned through external networks. DTMF GENERATOR The onboard DTMF generator fullfils the CEPT requirements with an external single pole filter. PIN DESCRIPTION
Name SOFT RECIN SN AGC MIC1 MIC2 GTR VCC GND IVLS VS VL V MC GREC EAREAR+ BUZ VRING RES PON RI OSC MSK DATA DCL VRMC VREF DTMF 2/17 Pin N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Description Transmit Softclipping Time Constant Receiving Input Sidetone Network Input Line Current Regulation Stop Value Microphone Input Microphone Input Transmit Gain Adjustment Transmit and Receive Part Power Supply Ground Line Current Source Power Supply Voltage Stabilizer Positive Line Unregulated Microcontroller Power Supply Receive Gain Adjustment Negative Earphone Output Positive Earphone Output Ringer Buzzer Output Ring Power Supply Reset Power On Ring Indicator Oscillator Input Mask, Ring Melody Input Data Input Data Clock Input Microcontroller Stabilized Power Supply Reference Voltage (VCC/2) DTMF Filter
RINGER Up to 8 different tones can be generated by the TEA7089Aringer. The digital volume control of the ringer can be performed through a specific command (4 steps). A ring indication signal is provided to the microcontroller by the TEA7089A.If more tones are requested the input RM/MSK allows to inject tones generated by the microcontroller. FURTHER ADVANTAGES The microcontroller power supply is provided by the TEA7089A.The power supply is specifically designed to copewitha longflash or a long groundkey duration. The TEA7089A is able to supply the necessary current to an external speakerphone circuit TEA7540 and loudspea ker amplifier TEA7532 without any additional circuitry. Line current and reset indications are provided to the microcontroller by the TEA7089A. The microcontroller drives the TEA7089A through a 2 wires serial interface.
7089A-01.TBL
To Line C8 C30 To P To Line C1 C12 VL RI
21 12 8 10 2 3
R10 R13 VCC Sidetone
R11
R12
VCC
IVLS
RECIN
SN
C11
Figure 1 : Block Diagram
VS
11
TEA7089A
18 26 17
R40 + R15 C16 C15
VREF VSTAB RING POWER SUPPLY LOGIC POWER SUPPLY BUZZER AMPLIFIER LINE CURRENT POWER SUPPLY
27
VREF
C14
R14
VRING VRMC BUZ
GREC
14
R17 MUTE AGC MUTE CONTROL
SIDETONE & AGC
EAR+
16
Earphone
Earphone Amplifier -1 SERIAL REGULATOR
EAR-
15
RING GENERATOR
13
VMC
C10
C3 KVL
R4
SOFT
1
R8
VIN
GTR
DTMF GENERATOR P INTERFACE AGC VREF PON & RESET CONTROL OSCILLATOR /2
7
23 MSK 25 DCL 24 DATA
MIC1
5
To P
Microphone
MIC2
6
4 9
28
20
19
22
C3 AGC DTMF
GND
PON To P
RES
OSC
VCC R25
TEA7089A
3/17
7089A-02.EPS
TEA7089A
ELECTRICAL CHARACTERISTICS The block diagram is given in Figure 1. The values of the different networks used in this datasheet are defined as followed : - The return loss is adjusted by R10 of 600. - The transmit adjust gain network R8 is calculated in order to have a gain of 46dB typical with ILS = 22mA. - The sidetone network ZST is set to be lower than 20dB (Vear/Vmic) on a 600 load on line. - The DC characteristics are set by a resistor of 82k between VL and VS. Absolute Maximum Ratings
Symbol Authorized Voltage on Pin 2 - RECIN Pin 3 - SN Pin 8 - VCC Pin 10 - IVLS Pin 12 - VL Pin 13 - VMC Pin 17 - BUZ Pin 18 - VRING Pin 19 - RES Pin 20 - PON Pin 21 - RI Pin 22 - OSC Pin 23 - MSK Pin 24 - DATA Pin 25 - DCL Pin 26 - VRMC ILINE IRING Toper Tstg Tj Line Current Ring Current Operating Temperature Storage Temperature Junction Temperature Parameter Value 13 12 11 6 12 6 VRING +0.3, GND -0.3 27 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 VRMC +0.3, GND -0.3 5 120 50 -25, +70 -55, +150 -25, +150 Unit V V V V V V V V V V V V V V V V mA mA C C
7089A-02.TBL
C
DC Characteristics (Tamb = 25C ; Logic in Default Mode unless otherwise noted)
Symbol VL Parameter Line Voltage - In Speech and DTMF Mode - In Mask Mode IVRMC VRMC IVMC Stabilized Supply Voltage - Output Current - Output Voltage Unstabilized Supply Voltage - Start up Current - Output Current Line Current Source Supply Test Conditions Test 1 IL = 22mA IL = 90mA IL = 22mA Test 1, IL = 22mA 1.5 IRMC = 1.5mA Test 1, IL = 22mA VMC = 2.5V, IVRMC = 1.5mA VMC = 3.6V, IVRMC = 0mA Test 1, VLS = 0V ; VMC = 3.6V IL = 22mA IL = 90mA 3.15 10 3.35 15 3 14 75 18 82 3.55 mA V mA mA mA mA Min. 4 6.7 Typ. 4.6 7.5 Max. 5.2 8.3 3 Unit V V V
ILS
10 67
The line current source supply depends of IL : - For IL < 20mA : ILS (mA) = 0.765 x IL (mA) - 1.4mA - For IL > 20mA : ILS (mA) = 0.92 x IL (mA) - 4.5mA On this pin the maximum output level is : V10 = V12 - (1.2 + 10 x ILS) and V10 < 6V
4/17
TEA7089A
ELECTRICAL SPECIFICATIONS (continued) AC Characteristics (Tamb = 25C ; RL = 600 ; Logic in Default Mode unless otherwise noted)
Symbol R1 Parameter Return Loss Test Conditions Test 2, IL = 22mA f = 300/3400Hz, V AC = -10dBV Min. 17 Typ. Max. Unit dB
Transmit Characteristics (Tamb = 25C ; RL = 600 ; f = 1kHz ; Logic in Default Mode unless otherwise noted)
Symbol Gtx Gtxl Gtxs Zmic Ntx Mmic Dtx VL Max. Microphone Input Impedance Noise Microphone Mute Soft Clipping - Distortion - Maximum Level on Line Parameter Microphone Gain Test Conditions Test 3, Vm = -55dBV R8 = 1.3k, R25 = 3.9k IL = 22mA IL = 90mA between MIC1 & MIC2 Test 3, 2k on microphone inputs, IL = 22mA Test 3, Vm = -55dBV, IL = 22mA Test 3, IL = 22mA, see Figure 2 Vm = -41dBV Vm = -34dBV 60 2 1.5 Min. Typ. Max. Unit
45 38 32
46 40 40 -76
47 42 48
dB dB k dBmp dB % Vp
Figure 2 : Softclipping
10 Thres hold Level
The maximum gain Gtl is adjustable between 44 and 56dB with R8 : R10 // RL + R11 Gtxl = 20log 820 R8 // 50k The AGC variation is programmed with one resistor connected on Pin AGC. ISL is the line current at which the gain must be decreased by 6dB. R25 () =
7089A-03.EPS
VAC peak on line (V)
1
-15 -10 -5 -2
1 10 Vmicrophon e pe a k (mV) 100 0.1
300
ISL - 5mA
(R25 > 2.6k)
0.1
For line current lower than ILL or higher than ISL, The transmit and receive gains have a constant value. If no resistor or a resistor higher than 300k is connected on Pin AGC, the gain is constant and equal to Gtxl and Grxl. 0.5dB.
Figure 3
10 8
VAC pe a k
VL (Pin 12) (V)
6 4 2 0 0
AGC can be inhibited also through MCU code "010100". In this case Tx and Rx gains are fixed 2dB lower than the maximum gain. The minimum saturation voltage of the TEA7089A respect to ground is 2.2V. On long line, when the voltage over TEA7089A is low, the softclipping function automatically limits the AC dynamic to avoid to reach the 2.2V limit on TEA7089A respect to ground.
VAC pe a k
20
40 60 IL (mA)
80
10 0
7089A-04.EPS
5/17
TEA7089A
ELECTRICAL SPECIFICATIONS (continued) Receive Characteristics (Tamb = 25C ; RL = 660 ; f = 1kHz)
Symbol Eff Parameter Sidetone Eff = (Vear+ - Vear -) /Vm Gain in Symmetric Mode Grx = (Vear+ - Vear-) / VL Distortion Test Conditions Test 3, Vm = -55dBV, IL = 22mA, R14 = 10k, R17 = 15k Test 6, VL = -14.5dBV, R14 = 10k, R17 = 15k, R25 = 3.9k IL = 22mA IL = 90mA Test 4, Rear = 300, IL = 22mA Vear = -12dBV Vear = -8dBV Test 4, IL = 22mA IL = 22mA, VL = -14.5dBV Min. Typ. Max. 22.5 Unit dB
GRXl GRXs Dr
0.7 -6
1.7 -4
2.7 -2 2 5
dB dB % % dBmp dB
Nr Vear (010010) Zout
Noise Earphone Mute Output Impedance
-76 60 20
Automatic Gain Control Inhibition (Tamb = 25C ; RL = 660 ; f = 1kHz no AGC mode selected)
Symbol Parameter Test Conditions Test 3 & Test 4, IL = 22 to 90mA Code : 010100 Vm = -55dBV VL = -14.5dBV Min. Typ. Max. Unit
Gtp Grp
Transmit Gain Receive Gain
Gtxl -5 Grxl -5
Gtxl -4 Grxl -4
Gtxl -3 Grxl -3
dB dB
Ring Characteristics (Tamb = 25C)
Symbol VThri ON VThri OFF ICRing VRMC tRON VRING Vbout Parameter Ringing Threshold Voltage Test Conditions Test 5 a/b RI high (see Figure 4) Rl low (see Figure 4) VRING = 10V Min. 15 5 1 3.45 IRING = 10mA 27 VRING = Level Level Level Level 27Vzener (see Figure 5) Code (011111) Code (011110) Code (011101) Code (011100) 12 4.4 2.2 1 13 5.6 2.8 1.4 13.5 6.7 3.4 1.8 3.75 Typ. Max. 20 9 1.2 4.05 100 Unit V V mA V ms V VRMS VRMS VRMS VRMS
Internal Consumption in Ring Mode Microprocessor Supply Voltage Rise Time Internal Zener Voltage Buzzer Vout Freq = 1312Hz Freq. Code 001111
Figure 4 : Ringer Hysteresis Ringer
ON
Figure 5 : Ringer Output Waveform
Ringer Status
Vbout
7089A-05.EPS
OFF
VOFF Ringer Threshold (VTHRI)
VON
V
6/17
7089A-06.EPS
TEA7089A
ELECTRICAL SPECIFICATIONS (continued) DTMF Generator (Tamb = 25C ; RL = 660)
Symbol Amf Parameter Tone Frequency Accuracy Test Conditions Test 6 Pin Osc fclock = 1.79MHz oscillator off or Resonator : 3.58MHz oscillator on C13 =100nF, IL = 22mA Min. - 0.4 Typ. Max. 0.4 Unit %
Llf Lhf Pmf tDON tDOFF Cmf
Low Freq. Group Line Level High Freq. Group Line Level Preemphasis HF/LF Rise Time Decay Time DTMF Confidence Tone : Earphone level (low freq.) Earphone level (high freq.) - Unwanted Harmonics Level (see Figure 6)
-10 -8 +1
-8.5 -6.5 +2
-7 -5 +3 5 5
dBm dBm dB ms ms mV mV -
13 17 -
17 22 -
21 27 -
-
Figure 6 : Unwanted Harmonics Level in DTMF
-30
-50 Vline (dBm)
-70
-90 100
1k
10k (Hz)
100k
1M
Figure 7 : Microcontroller Interface
VRING VL IS pe ech IS tart-u p kIL
18
7089A-07.EPS
I (In Ring)
VMC
13
VRMC (3.4V)
26
Ba tte ry
C10 47 F
VREFI 5.6V
C15 10 F
P + LCD
7/17
7089A-08.EPS
TEA7089A
MICROCONTROLLER INTERFACE WITH TEA7089A All inputs can be driven by a Low level max. of 0.1 x VRMC and a high level min. of 0.9 x VRMC . Inputs MSK, DCL and DATA have internal pull-up resistors of 120k and input OSC has a internal pull up of 240k. All outputs can drive a 1mA typical. Power Supply The microcontroller is power supplied by a 3.4V regulated supply (VRMC) and by an unregulated power supply (VMC). The two supplies are connected through a serial regulator.The unregulatedpower supply (VMC) has a DC voltageequal to: V12 - 0.6V and must be lower than 6V. It is also possible to connect a battery at Pin VMC and use the regulated output at Pin VRMC to supply a LCD driver. The current consumption on the serial regulator has a typical value of 60A. Power ON (PON) The TEA7089Ageneratesa poweron signal (PON) as soon as the voltage on Pin VRMC is higher than 2.6V (0.75 x VRMC final) and the line current is present. Note : Du ri ng th e b re a k p e riod in t he loopdisconndect and Flash mode and during the exchange line break, the power ON signal goes to low level. Maximum delay for Pon decay edge after I Line goes to zero is 50ms (with C8 = 47F, C11 = 1F, C27 = 10F). Reset The TEA7089Agenerates a rise edge Reset signal as soon as the logic power supply is higher than 2.6V (0.75 x VRMC final). RESET remains high until VRMC decreases below 2.5V or the RESET control code is received. In Ring, RESET is identical to RI output. Only new positive edge PON, derived on opening and closing the line, is forcing the default mode again. The Reset control code is only active in speech mode. Serial Bus Interface (Data and Clock) The serial bus uses 6 bits. Astandard 8 bit bus can be used, bits a6 and a7 are not take in account by the TEA7089A. Different types of codes are used : a) The Ring Control Code : - Ring start up - Output level codes b) The Operating Code : - Speech - Dialing - Microphone mute - Earphone/Microphone mute c) The Data Codes (DTMF, ring frequencies) : Those data codes are stored inside the TEA7089Aand are used as soon as the dialing code or the ring start code is received. d) The Configuration Code : - AGC / no AGC (toggle) - No mask / mask (Low DC in "make") (toggle) - Normal gain / normal gain +6dB, on receive channel (toggle) - 1.79MHz external clock / 3.58MHz internal oscillator (toggle) Those configuration codes are "Flip-Flop" codes. For instance : The first time that the+6dB code is sent, the receive gain increases of +6dB. If the same code is sent again, the receive gain goes back to normal value. In the same way the 3.58MHz internal oscillator can be switched OFF with a second transmission of the proper code. e) The RESET Code : Reset code from the MCU will reset internallogic of TEA7089A to default mode and will induce TEA7089A to generate a "RESET" status "low" to the MCU on Pin 19. Warning : the "RESET" code deactivates the serial bus interface which is reactivated only after a "ON-HOOK/OFF-HOOK" sequence. f) The INITIALIZATION Code : Initialization code from the MCU will reset the internal logic of TEA7089A to default mode, but the TEA7089Awill not generatereset command to the MCU on Pin 19.
8/17
TEA7089A
MICROCONTROLLER INTERFACE WITH TEA7089A (continued) Figure 8 : Reset and Power ON
Wit ho u t u s ing th e RES ET Co d e th ro u gh th e S e ria l Bu s Inte rfa c e IL A B C D E D A
VMC 5 2.7 VRMC 3.4 2.6
t
t 2.5V t
PON
RES ET
t
t Us in g the RES ET Cod e th ro u gh th e S e ria l Bus Inte rfa c e IL A B C D E D F D A
VMC 5 2.7 VRMC 3.4 2.6 2.5V PON td td
t
t
t
RES ET
t
t A : ON-HOOK B : S TART UP + S P EECH C : P ULSE DIALING D : SP EECH or DTMF E : LINE BREAK EXCHANGE DURATION F : LINE BREAK EXCHANGE DURATION > td td : DELAY FIXED BY THE MICROCONTROLLER Re s et control code (010111) s e nt on the s e rial bus
7089A-09.EPS
9/17
TEA7089A
MICROCONTROLLER INTERFACE WITH TEA7089A (continued) The Start Up Conditions of the TEA7089A As soon as RESET is high and before sending any code the circuit is in the following default configuration : - Speech - No mask - AGC ON in transmit and receive channels - Normal gain on receive channel - 1.79MHz input clock (oscillator in stand by) 6 bit Codes Between two DTMF or ring frequencies, introducing a Mute or speech code implies to wait 1ms to end the sinewave or square period. DTMF Dialing To dial in DTMF the following sequence of codes must be sent : DTMF Frequency code : 00XXXX Dialing Mode code : 010001 Mute or SPEECH code : 010010 or 010000 The duration of the DTMF signal is fixed by the delay between Dialing mode code and MUTE or SPEECH code. Pulse Dialing The pulse dialing function is performed by the Figure 9 : DATA/CLOCK Timing
t0 t1 CLK Data t2 t3 t4 t5 t3
microcontroller through the high voltage stage. The "MAKE" voltage over the TEA7089A during dialing can be reduced by sending the mask code 0010101. To recover the normal speech voltage at the end of dialing the mask code must be sent again. If the mask code is not used the voltage over the TEA7089Aduring dialing is the same as in speech mode. Ring Indicator (RI) In ring mode TEA7089A generates a high logic level on Pin RI as soon as the voltage on Pin VRING is higher than VTHRI ON (19V Typ.), and the voltage on VRMC is higher than 3.4V. When the voltage on VRMC becomes higher than 2.6V, RESET signal becomes also high. Mask Input (MSK) MSK input must be high by default (Figure 10). In speech configuration forcing MSK input to low level will have same functionality than the MASK code. For ring mode when it is necessary to send other frequencies than the 8 basic ones, this input allows to drive the buzzer output.
Data
a0
a1
a2
a3
a4
a5
a6
7089A-10.EPS 7089A-11.EPS
S ynchro
Datas with a Change During CLK = 1
t0, t1, t2, t3, t4, t5 > 1s
Figure 10 : MASK Timing
P ULSE MODE IL OTHER MODES FLASH MODE OTHER MODES
MSK
10/17
TEA7089A
MICROCONTROLLER INTERFACE WITH TEA7089A (continued)
Codes a5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 a4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 1 1 1 1 a3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 0 1 1 1 1 1 a2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 1 0 1 1 1 1 a1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 0 0 0 1 1 a0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 0 0 1 0 1 "+6dB" Keyboard "2" "1" "A" "3" "8" "7" "C" "9" "5" "4" "B" "6" "0" "*" "D" "#" 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz 1336Hz 1209Hz 1633Hz 1477Hz + 697Hz + 697Hz + 697Hz + 697Hz + 852Hz + 852Hz + 852Hz + 852Hz + 770Hz + 770Hz + 770Hz + 770Hz + 941Hz + 941Hz + 941Hz + 941Hz Remarks
In DTMF Dialing
822Hz Ring Signal 744Hz Ring Signal 1005Hz Ring Signal 909Hz Ring Signal 1187Hz Ring Signal 1074Hz Ring Signal 1451Hz Ring Signal 1312Hz Ring Signal Speech Mode Dialing Mode or Ring Start Earphone & Microphone Mute Microphone Mute Mask/No Mask Normal/+6dB on Receive Channel Reset Pin Control Initialization Code AGC / No AGC
In Ring Mode
1.79MHz Ext Clock & Oscillator Stand by / 3.58MHz Ceramic (toggle) Minimum Ring Level (level 1) Intermediate High Ring Level (level 3) Maximum Ring Level (level 4)
7089A-03.TBL
Intermediate Low Ring Level (level 2)
11/17
TEA7089A
Figure 11 : Test Circuits - Test 1 (VL / VRMC / VMC / IVMC / ILS )
33 100F 600 47F VREF 560k
1 SOFT 26 VRMC
C2 4.7nF VCC
13V 620 1F
82k
1.6k
Sidetone 15k VCC
IL
3.9k
8 2 11 12
100nF
3
RECIN
VCC
4 AGC
SN
VS
VL
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 ILS 47F
7089A-12.EPS
47nF
18 VRING
GND
MSK
OSC
PON
DCL
VCC
24V
10F
25
24
23
22
21
20
19
9
Figure 12 : Test 2 (R1)
IAC 100F C2 4.7nF VCC 13V 620 1F 100nF
8 2 11 12 3
33 82k 1.6k Sidetone 15k VCC
IL
VAC 47F VREF 560k
3.9k RECIN VCC VS
4 AGC 1 SOFT
SN
VL
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
26 VRMC
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 ILS 47F
7089A-13.EPS
47nF
18 VRING
GND
MSK
OSC
PON
DCL
VCC
24V VAC I AC
10F
25
24
23
22
21
20
19
9
Z=
RI = 20 log
Z + 600 Z - 600
12/17
TEA7089A
Figure 13 : Test 3 (Gtl / Gts / Zmic / Nt / Mmic / Dt / Vlmax / Eff)
33 100F 600 47F VREF 560k
1 SOFT 26 VRMC
C2 4.7nF VCC
13V 620 1F
82k
1.6k
Sidetone 15k VCC
IL
3.9k
8 4 AGC 2 11 12
100nF
3
VL
RECIN
VCC
SN
VS
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 MIC2 6
300
Vear
10F
100F 47
17 BUZ
47nF
18 VRING
2k 470nF RESET MIC1 5 GND DATA MSK OSC PON DCL
Vm
24V
10F
1N4148 IVLS 10 ILS 47F VCC
7089A-14.EPS
25
24
23
22
21
RI
20
19
9
V12 Gtl/Gts = 20 log V m
V12 (010000) Mmic = 20 log V (010011) 12
Vear Eff = 20 log V m
Figure 14 : Test 4 (Grl / Grs / Dr / Mear / Nr)
IAC 100F C2 4.7nF V CC 13V 620 1F 100nF
8 2 11 12 3
33 82k 1.6k Sidetone 15k VCC
IL
VAC 47F V REF 560k
3.9k VCC RECIN VL
4 AGC 1 SOFT 26 VRMC
SN
VS
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
V ear
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 ILS 47F
7089A-15.EPS
47nF
18 VRING
GND
OSC
PON
MSK
DCL
VCC
24V
10F
25
24
23
22
21
20
19
9
V ear Grl/Grs = 20 log V12
13/17
TEA7089A
Figure 15 : Test 5a (Vthri)
33 C2 4.7nF VCC 47F VREF 560k
1 SOFT 26 VRMC
13V 620 1F
82k
1.6k
Sidetone 15k VCC
3.9k
8 2 11 12
100nF
3
RECIN
VCC
VS
4 AGC
SN
VL
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 47F VCC
7089A-16.EPS
Vbout
47nF
18 VRING
Vthri
24V
10F
25
24
23
22
21
20
19
9
Figure 16 : Test 5b (Vbout)
33 C2 4.7nF V CC 47F V REF 560k
1 SOFT 26 VRMC
GND
MSK
OSC
PON
DCL
13V 620 1F
82k
1.6k
Sidetone 15k VCC
3.9k
8 2 11 12
100nF
3
VCC
RECIN
4 AGC
SN
VS
VL
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 ILS 47F
7089A-17.EPS
V bout
47nF
18 VRING
GND
OSC
PON
MSK
DCL
VCC
IRING
10F
25
24
23
22
21
20
19
9
6 bit serial code (0111XX/Fi/0 10001) ; OSCIN = 1.79MHz external clock (default mode) or 3.58MHz external ceramic/cryst l (with code "101000" to select internal oscillator) a
14/17
TEA7089A
Figure 17 : Test 6 (DTMF)
33 100F 600 47F VREF 560k
1 SOFT 26 VRMC
C2 4.7nF VCC
13V 620 1F
82k
1.6k
Sidetone 15k VCC
IL
3.9k
8 2 11 12
100nF
3
VCC
RECIN
VL
4 AGC
SN
VS
VREF 1.3k 10k
GTR 7 GREC 14 15k
100nF 100nF
10F
28 DTMF
EAR+ 16
27 VREF 13 VMC
TEA7089A
2.2F EAR- 15 2k MIC2 6
300
10F
100F 47
17 BUZ
470nF MIC1 5 RESET DATA RI 1N4148 IVLS 10 ILS 47F
7089A-18.EPS
47nF
18 VRING
GND
MSK
OSC
PON
DCL
VCC
10F
25
24
23
22
21
20
19
9
6 bit serial code (00XXXX/Fi/010010 ; OSCIN = 1.79MHz external clock (default mode) ) or 3.58MHz external ceramic/crystal (with code "101000" to select internal oscillator)
15/17
TEA7089A
TYPICAL APPLICATION
Q1 BSS92 R27 5.6 R28 22k VCC C8 47F D11 6.2V V REF R4 560k
1 SOFT
Impedance C2 4.7nF R10 620
R11 33 D2 13V R12 82k C11 1F R13 300
Sidetone R5
C5 R6 VCC
R25
8 2 11 12
C12 100nF
3
RECIN
V CC
4 AGC
SN
VS
VL
VREF R8 1.3k C26 1F R14 10k
GTR 7 GREC 14 R17 15k EAR+ 16 C17 2.2nF
C1 820nF A
C3 100nF R40 1k C13 100nF
28 DTMF
SW1A D9 B 4 x 1N4004 D6 D7 Buzzer D8 C14 47nF C10 470F 47
27 VREF 13 VMC
TEA7089A
EAR- 15 MIC2 6 Handset
17 BUZ
R21 2k MIC1 5
C21 47nF C22 47nF
R15 1k RESET DATA GND MSK PON OSC SW1B VRMC DCL D3 24V C16 10F
18 VRING
IVLS 10 C30 47nF
V CC
C15 4.7F R29 22k Q3 BF393 D5 BAT42 C18 30pF X1 R2 330k
26
25
24
23
21
RI
20
19
9
22
3.58MHz X2
C19 30pF
MCU
7089A-19.EPS
1 4 7 *
2 5 8 0
3 6 9 #
S M L R
16/17
TEA7089A
PACKAGE MECHANICAL DATA 28 PINS - PLASTIC PACKAGE
Dimensions A a1 b b1 C c1 D E e e3 F L S
Min. 0.1 0.35 0.23
Millimeters Typ.
Max. 2.65 0.3 0.49 0.32 45 (Typ.)
o
Min. 0.004 0.014 0.009
Inches Typ.
Max. 0.104 0.012 0.019 0.013
0.5 17.7 10 1.27 16.51 7.4 0.4 7.6 1.27 8 (Max.)
o
0.020 18.1 10.65 0.697 0.394 0.050 0.65
SO28.TBL
0.713 0.419
0.291 0.016
0.299 0.050
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical comp onents in lifesupport devicesor systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - All Rights Reserved Purchase of I C Components of STMicroelectronics, conveys a license under the Philips I C Patent. Rights to use these components in a I 2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco- The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
2 2
17/17
PM-SO28.EPS


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